Post correction of Analog To Digital Converter with Real-time FPGA Implementation A Review

Paper Topic :

Expert approaches

Author Name :

Pradip Mane, P. L. Paikrao

Abstract :

In this paper, a post-correction method is proposed to correct the nonlinearity & distortion which is available at output of high speed analog-to-digital converters (ADCs). It is achieved by simplifying the dynamic deviation reduction based Volterra series to form a better model to effectively minimize both static nonlinearities and memory effects. Both post-correction model and extraction model modules can be readily implemented in FPGA, which provides great simplicity in realizing real time calibration. Experimental results demonstrated that excellent performance can be achieved with less implementation complexity by using the proposed method

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