Edge Detection Using Canny Algorithm on FPGA

Paper Topic :

VLSI Algorithms

Author Name :

Aasiya Anjum

Abstract :

ABSTRACT: In image processing and object recognition edge detection is used as a key stage. The Canny edge detection algorithm is used mostly because of its good performance. In this paper we present a edge detection using Canny algorithm on FPGA that results in significantly decrease Latency, decrease delay and increased throughput with no loss in edge detection. FPGA hardware architecture, Xilinx 13.1 software are used in this paper. The algorithm uses a low complexity 8 bit non-uniform gradient magnitude histogram to compute block based hysteresis thresholds that are used by the canny edge detector .The FPGA simulation results show that we can process a 218X218 image in 0.25msec at a clock rate of 100 MHz.

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